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TTTC's Electronic Broadcasting Service |
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IEEE INTERNATIONAL WORKSHOP on DEFECTS, ADAPTIVE TEST, YIELD AND DATA ANALYSIS
SUBMISSION DEADLINE EXTENDED TO October 7th, 2016 |
CALL FOR PAPERS AND PARTICIPATION |
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THEME: “Toward Real Time Understanding” The scope of the DATA workshop once again returns to our common theme, which has always been DATA, specifically, semiconductor test and yield data. We in the semiconductor industry create billions of data points every hour, and we’ve made great strides in capturing, storing, and analyzing these data. As the cost of storage falls, and query and analysis capabilities become ever more powerful, the next horizon for DATA professionals is Real Time Understanding. How quickly can we turn our copious data from wafer sort, final test, in-line defect inspection, etc. into an understanding that leads to immediate or even pre-emptive action? The time and cost pressures we’re facing as an industry make the move towards short-loop process improvement an imperative.The Organizing Committee for the DATA-2016 Workshop is soliciting papers in the area of semiconductor test, yield analysis, learning, and improvement. Of particular interest are advanced techniques and new tools for approaching Real Time Understanding of yield loss drivers, tester & manufacturing efficiency, & outlier detection in semiconductor manufacturing, including implementation of adaptive test. Preference will be given to real-world case studies. Ideas or proposals for Embedded Tutorials, Debates, Panel Discussions and Poster style “Spot-Light” presentations describing industrial experiences or research are also invited. Suggested Topics
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To present at the workshop, send to arani.sinha@intel.com a PDF version of an extended abstract or a full paper (Max 10 pages, double column, 11pt font size, IEEE proceeding format). Each submission should include full name and address of each author, affiliation, telephone number, FAX and Email address. Camera-ready papers for inclusion in the digest of papers will be due on October 21, 2016. |
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| Additional Information | |
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General Information: Jennifer DworakSouthern Methodist University, USA. E-mail: jdworak@lyle.smu.edu Technical Program Submissions: Arani Sinha Intel, USA. E-mail: Arani.Sinha@INTEL.com | |
| Committee | |
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GENERAL CHAIR Jennifer Dworak, SMU PROGRAM CHAIR Arani Sinha, Intel VICE-PROGRAM CHAIR Wesley Smith, Galaxy FINANCE CHAIR Sagar Kekare, KLA-Tencor PUBLICITY & WEB CHAIR Sankaran Menon, Intel PUBLICATIONS CHAIR Chintan Patel, UMBC PANEL CHAIR Anne Meixner, The Engineers' Daughter LLC LOCAL ARRANGEMENTS David Park, Optimal+ TEST STANDARDS CHAIR Al Crouch, SiliconAid EU LIAISON Rene Segers, Qualtera STEERING COMMITTEE Jeffrey Roehr, Texas Instruments Sankaran Menon, Intel Adit Singh, Auburn Univ. M. Tehranipoor, U CT Hank Walker, Texas A&M Hans Manhaeve, Q-Star Test Jim Plusquellic, U. NM PROGRAM COMMITTEE Rob Aitken, ARM Nemat Bidokhti, Cisco Sreejit Chakravarty, Intel John Carulli, Global Foundries Patrick Girard, LIRMM, France Ajay Khoche, Consultant Mike Laisne, Qualcomm Amit Nahar, TI Suriyaprakash Natarajan, Intel Jay Orbon, Consultant John Potter, Asset-Intertech Rajesh Raina, NXP Claude Thibeault, ETS, Canada Li C. Wang, UCSB Xiaoqing Wen, KIT, Japan Qiang Xu, CUHK, Hong Kong |
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| For more information, visit us on the web at: Conference website: http://DATA.tttc-events.org/ |
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DATA 2016 is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC). |
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IEEE
Computer Society- Test Technology Technical Council |
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